Method of clock routing for semiconductor chips

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United States of America Patent

PATENT NO 6006025
SERIAL NO

08934995

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Abstract

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A method of wire routing includes the steps of providing an array of cells on a semiconductor chip, determining a minimum distance location between a first clock point, an second clock point and a drive point for connecting to a connection point in the array of cells, and defining a wire path through an array of blockages disposed in the array of cells from the minimum distance location to the first clock point and from the minimum distance location to the second clock point to create a path for a wire for connecting the first clock point and the second clock point to a connection point such that skew is minimized between the starting clock point and the second clock point from the connection point when a clock signal is provided to the connection point from the drive point.

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Patent Owner(s)

Patent OwnerAddress
IBM CORPORATION1101 KITCHAWAN ROAD OFFICE 36-238C YORKTOWN HEIGHTS NY 10598

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cook, Peter William Mount Kisco, NY 5 134
Restle, Phillip John Katonah, NY 25 339

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