Differential current switch logic gate
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United States of America Patent
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Jan 11, 2000
Grant Date -
N/A
app pub date -
Sep 26, 1997
filing date -
Sep 26, 1997
priority date (Note) -
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Abstract
A differential current switch logic (DCSL) system is provided which has an evaluation tree including a plurality of input terminals and a pair of complementary output nodes. The DCSL system also has an output network which establishes a pair of state outputs at a predetermined level during a precharge phase and establishes the state outputs at complementary levels in response to the evaluation tree output nodes during an evaluate phase. First and second NMOS transistors are connected in series between the DCVS output state network and the evaluation tree output nodes with their gates coupled to the state outputs to isolate the outputs from the evaluation tree following evaluation.
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