IC stack utilizing BGA contacts
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jan 11, 2000
Grant Date -
N/A
app pub date -
Jun 10, 1998
filing date -
Jun 13, 1997
priority date (Note) -
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status (Latency Note)
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Abstract
A structure and process are disclosed in which IC chip-containing layers are stacked to create electronic density. Each layer is fabricated by forming one or more flexible circuit around a TSOP. Each flexible circuit contains conductors which are disposed to connect with TSOP leads, transpose signals to or from various locations on the top or bottom of the TSOP, and/or terminate in ball grid contacts for connection to other layers in the stack. The flexible circuit is bonded to the TSOP such that ball grid contacts are exposed on the top and bottom of the TSOP, and the ball grid array contacts on the bottom of the lowest layer are disposed to facilitate connection with a PCB or other circuitry.
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