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Abstract

A method is presented for event-related functional testing of a microprocessor. A model of the microprocessor is adapted to produce a trigger event, perform a target activity, and respond to a control signal. The target activity occurs over several system clock signal cycles. A control signal generator receives the trigger event and generates the control signal a selectable number of clock cycles (i.e., a delay time) after the trigger event. A testing program includes a program loop which causes the microprocessor model to produce the trigger event, perform the target activity to produce a test result, and compare the test result to an expected result. The program loop is repeatedly executed until the microprocessor model responds to the control signal during each clock cycle of the target activity. If the test result matches the expected result during each execution of the program loop, the microprocessor properly responds to the control signal during the target activity. The microprocessor model may be a software or hardware implementation. Software embodiments of a bus model, a memory model, and a test engine provide an operating environment for the microprocessor model. A microprocessor testing system includes a central processing unit (CPU), chip set logic, a system bus, a memory bus, and a memory unit. In a first embodiment of the testing system, the microprocessor model, the bus model, the memory model, and the test engine reside within the memory unit. In a second embodiment, the microprocessor model is a separate hardware implementation.

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First Claim