Nitrogen implanted polysilicon gate for MOSFET gate oxide hardening

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United States of America Patent

PATENT NO 6017808
SERIAL NO

08957692

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Abstract

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A method for hardening of gate oxide without forming low dopant concentration regions at the gate oxide-polysilicon interface is described. Polysilicon is deposited onto gate oxide followed by nitrogen implantation and annealing. At this point nitrogen concentration peaks exist at the gate oxide interfaces with the single crystal substrate and the polysilicon gate electrode. This effectively hardens the gate oxide. A third polysilicon gate electrode exists in the bulk of the polysilicon gate electrode. In the described process the region of the polysilicon layer that contains the nitrogen concentration peak is removed. An electronically active dopant may then be implanted. Alternatively, a fresh polysilicon layer may then be deposited followed by implantation of an electronically active dopant. Thus, the method of the invention avoids retardation of electronically active dopant diffusion.

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Patent Owner(s)

  • BELL SEMICONDUCTOR, LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Wang, Shiuh-Luen San Jose, CA 3 74
Yao, Chiang-Sheng Palo Alto, CA 1 41
Yeh, Wen-Chin Fremont, CA 8 121

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