Chain-connected shift register and programmable logic circuit whose logic function is changeable in real time
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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-
Jan 25, 2000
Grant Date -
N/A
app pub date -
Dec 16, 1996
filing date -
Dec 19, 1995
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A shift register having a plurality of circuit cells successively connected in a chain formation is proposed. Each of the circuit cells includes a first inversion gate, a first transmission gate, connected to an output of the first inversion gate, being switched by a clock, and a second inversion gate connected to an output of the first transmission gate. The circuit cell further includes a first P-channel transistor, connected between an output of the second inversion gate and an input of the first inversion gate, being switched by the clock, a second transmission gate, connected to the output of the second inversion gate, being switched by an inversion clock, and a second P-channel transistor, connected to the output of the first transmission gate, being switched by the inversion clock. In the shift register, the plurality of circuit cells are successively connected such that the input of the first inversion gate of the circuit cell is connected to an output of a second transmission gate of a former-stage circuit cell, and the output of the first inversion gate of the circuit cell is connected to an output of a second P-channel transistor of the former-stage circuit cell.
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