Work station having simultaneous access to registers contained in two different interfaces
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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-
Jan 25, 2000
Issued Date -
N/A
app pub date -
Oct 19, 1992
filing date -
Aug 31, 1990
priority date (Note) -
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status (Latency Note)
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Abstract
A work station which includes a central processing unit (CPU), first and second interface chips connected to respective external or peripheral units, and a local bus connected to the CPU and chips and adapted for multiple byte data communication between the CPU and chips. First and second one-byte registers are included in the first and second chips, respectively, and are simultaneously accessible by the CPU.
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