Method of forming buried diffusion junctions in conjunction with shallow-trench isolation structures in a semiconductor device
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United States of America Patent
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Feb 1, 2000
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N/A
app pub date -
Apr 20, 1998
filing date -
Jan 23, 1998
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Abstract
A method is provided for use in a semiconductor fabrication process to form buried diffusion junctions in conjunction with shallow-trench isolation (STI) structures in a semiconductor device. This method features beak-like oxide layers formed to serve as a mask prior to the forming of the STI structures, which can prevent the subsequently formed buried diffusion junctions from being broken up during the process for forming the STI structures. Moreover, sidewall-spacer structures are formed on the sidewalls of a silicon nitride layer used as a mask in the ion-implantation process. This can prevent short-circuits between the buried diffusion junctions when the doped areas are annealed to be transformed into the desired buried diffusion junctions.
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