Printed circuit substrate with solder formed on pad-on-via and pad-off-via contacts thereof
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United States of America Patent
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-
Feb 1, 2000
Issued Date -
N/A
app pub date -
Nov 12, 1996
filing date -
Mar 29, 1996
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A printed circuit substrate having solder bumps formed on pad-on-via contacts and pad-off-via contacts. The printed circuit substrate has at least one pad-on-via contact and at least one pad-off-via contact. A first solder bump is on the pad-on-via contact and a second solder bump is on the pad-off-via contact. The first and second solder bumps are substantially the same height as measured above a horizontal plane that is substantially co-planar to the pad-off-via contact.
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