High speed memory module
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United States of America Patent
Stats
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Feb 1, 2000
Grant Date -
N/A
app pub date -
Feb 17, 1998
filing date -
Feb 17, 1998
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A high-speed memory module defined by first and second elements the first element including a plurality of flexible, interior layers laminated together to form a substrate having opposed exterior surfaces, the substrate having a network of conductive traces and vias forming data paths therein, at least two substantially quadrangular, rigid circuit boards, each of the boards laminarly split into substantially symmetric half-sections, each of the half-sections having solder lands formed on a first face for mounting electronic components thereto and conductive traces and vias incorporated therein forming a continuation of the data paths, each of the half-sections having an opposite second face for bonding to the exterior surfaces of the substrate, the half-sections laminated together on either side of a portion of the substrate with the substrate being sandwiched therebetween, wherein any gap between two parallel spaced-apart edges of any two adjacent boards is wide enough to allow mounting of the boards in a parallel, face-to-face, layered arrangement by folding the substrate at the gap, the gap being wide enough to allow for an air space between any opposite facing component attached to separate boards, and the second element including, a rigid circuit board having a network of conductive traces and vias incorporated therein the board defined by spaced-apart first and second elongated edges, a comb of connecting terminals integral with the second element along the first elongated edge, the comb connected to the traces and vias to continue the data paths, the comb sized and dimensioned to engage a connecting port on a supporting structure, and a first plurality of feed-through holes engaging the data paths in the first element arranged for connection to a like second plurality of feed-through holes engaging the data paths formed in the second element, and device for interconnecting the first and the second feed-through holes so that the data paths from each of the half-sections through to the support structure are of substantially equal lengths.
First Claim
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| SMITH GARY W | Not Provided |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Smith, Gary W | 12376 Darkwood Rd., San Diego, CA 92129 | 20 | 957 |
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Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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