Clock compensation circuit

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United States of America Patent

PATENT NO 6023180
SERIAL NO

09195419

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Abstract

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A clock compensation circuit includes a clock tree; a reference clock; a phase detector for detecting relative phase information of the tree clock and the reference clock; a controller, coupled to said phase detector, for determining and controlling the amount of delay necessary to shift the output of the clock tree in phase with the reference clock; and a programmable delay logic coupled to said controller. The programmable delay logic comprises a string of delay elements that selectively participate in a delay string for shifting the tree clock in phase with the reference clock.

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Patent Owner(s)

Patent OwnerAddress
MCDATA SERVICES CORPORATION1745 TECHNOLOGY DRIVE SAN JOSE CA 95110

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Schmidt, Steven G Mount Holly, NJ 13 473

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