ESD protection circuits
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United States of America Patent
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Feb 15, 2000
Grant Date -
N/A
app pub date -
Dec 23, 1996
filing date -
Dec 23, 1996
priority date (Note) -
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Abstract
Electro-static-discharge (ESD) protection circuits are supplied for inhibiting the destruction of buffers, drivers, logic and memory cells in Metal-Oxide-Semiconductor (MOS) devices such as a CMOS device including Static-Random-Access-Memory (SRAM). This is accomplished by tiering diodes adjacent the input of the chip and in certain specific areas internally of the chip (e.g. power supplies etc.) providing bidirectional diode protection from over-voltage.
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