Advanced modular cell placement system with overlap remover with minimal noise

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United States of America Patent

PATENT NO 6026223
SERIAL NO

08672937

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method for refining the position of linearly aligned cells on the surface of a semiconductor chip is disclosed herein. The method comprises defining an array of spaces between cells based on maximum and minimum cell positions, establishing a minimum spacing between cells, and linearly shifting cells in a predetermined manner such that no cells are closer to one another than the minimum spacing between cells. Linear shifting is accomplished by shifting any cell in a positive direction if the spacing associated the cell is less than the minimum spacing between cells; shifting any cell in a negative direction if the spacing associated with the cell is greater than the minimum spacing between cells, but only if all cells on the negative side of the cell have been shifted in their maximum negative direction; and performing positive shifting and negative shifting until all cells have been shifted such that no space between cells is less than the negative space between cells.

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Patent Owner(s)

Patent OwnerAddress
BELL SEMICONDUCTOR LLC401 N MICHIGAN AVE SUITE 1600 CHICAGO IL 60611

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Andreev, Alexander E Poselok Mosrentgen, 2-oy Muzikalni, Proezd, D.3, Kv. 175, 142704 Moskovskaga Oblast, RU 147 4411
Koford, James S 470 Navaro Way, #116, San Jose, CA 95134 78 4551
Scepanovic, Ranko 1063 Avondale St., San Jose, CA 95129 165 5904

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