Method of forming variable thickness gate dielectrics

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United States of America Patent

PATENT NO 6033998
SERIAL NO

09038684

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Abstract

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Provided is a method of fabricating gate dielectric layers having variable thicknesses and compositions over different regions of a semiconductor wafer. In a preferred embodiment of the present invention, a gate oxide layer is first grown over the various regions. Regions that are to have a relatively thicker, unhardened gate dielectric are masked and the wafer is exposed to a remote low energy nitrogen plasma. After the nitridization process is completed, the mask is removed and the wafer is exposed to further oxidation. The regions where oxynitrides have been formed act as a barrier to the oxidation process. Consequently, different oxide thicknesses can be grown on the same wafer, thinner and hardened where nitridization has been performed, and thicker and not hardened in those regions that were masked during the nitridization. Variable thickness gate dielectrics in accordance with the present invention may be particularly advantageous in semiconductor integrated circuits involving both digital and analog devices.

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Patent Owner(s)

Patent OwnerAddress
BELL SEMICONDUCTOR LLC401 N MICHIGAN AVE SUITE 1600 CHICAGO IL 60611

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aronowitz, Sheldon San Jose, CA 80 1553
Chan, David San Jose, CA 139 2914
Haywood, John Santa Clara, CA 14 507
Kimball, James San Jose, CA 14 316
Lee, David San Jose, CA 405 5789
Sukharev, Valeriy Cupertino, CA 24 565

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