Programmable input/output block (IOB) in FPGA integrated circuits
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United States of America Patent
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Mar 7, 2000
Grant Date -
N/A
app pub date -
Dec 22, 1997
filing date -
Dec 22, 1997
priority date (Note) -
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Abstract
A Field Programmable Gate Array (FPGA) device includes a plurality of input/output blocks (IOBs) and variable grain blocks (VGBs) An inter-connect network provides routing of signals between the IOBs and VGBs. The VGBs include a plurality of L-organized CBBs (configurable logic blocks) having function-producing resources. The IOBs are arranged along a top, left, bottom and right side of the plurality of VGBs. An IOB includes a 1) delay for timing input signals, 2) a configurable output latch which may be set or reset responsive to control signals, and 3) transistor for controlling a NOR line. The IOB is programmably configured to the inter-connect network which includes vertical and horizontal inter-connect channels comprising adjacent inter-connect lines.
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