Method and apparatus for dual issue of program instructions to symmetric multifunctional execution units
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United States of America Patent
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-
Mar 7, 2000
Grant Date -
N/A
app pub date -
Jun 27, 1997
filing date -
Jun 27, 1997
priority date (Note) -
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Abstract
A microprocessor capable of processing at least two program instructions at the same time and capable of issuing the two program instructions to two symmetrical multifunctional program execution units. The microprocessor includes a plurality of registers which store a plurality of operands and an instruction issue control which controls issuance of program instructions to the two symmetrical multifunctional program execution units. The instruction issue control issues the two program instructions (e.g. first and second) without decoding them in order to determine the processing functions required to be performed in response to the two program instructions.
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