Method for making integrated circuit having polymer interlayer dielectric
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United States of America Patent
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Mar 14, 2000
Issued Date -
N/A
app pub date -
May 12, 1999
filing date -
May 12, 1999
priority date (Note) -
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Abstract
An improved method for making an integrated circuit that includes forming a conductive layer on a substrate, then forming a dielectric layer comprising a polymer on the conductive layer. After forming the dielectric layer, a layer of photoresist is patterned to define a region to be etched. An etched region is then formed through the dielectric layer while simultaneously removing the layer of photoresist.
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