Microcontroller having register direct and register indirect addressing
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United States of America Patent
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-
Mar 14, 2000
Issued Date -
N/A
app pub date -
Jan 16, 1997
filing date -
Feb 9, 1993
priority date (Note) -
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Abstract
A microprocessor on-board RAM provides both the usual random access by addressing and a subset of memory cells with their contents continually available on a secondary bus paralleling the data bus. This secondary bus may be used for register indirect addressing without a separate register read when the RAM subset includes the registers for register indirect addressing. The processor also has a two stage output driver for limiting maximum output current and feedback-controlled clock period partitioning.
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