Method (and device) for producing tunnel silicon oxynitride layer
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Mar 21, 2000
Grant Date -
N/A
app pub date -
Feb 5, 1998
filing date -
Aug 11, 1997
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A novel method of fabricating a flash memory cell. The present method includes a step of providing a semiconductor substrate (101) having a first active region (111), a second active region (109), and an isolation region (103). The isolation region is defined between the first active region and second active region. The process undergoes a step of masking (105) a portion of the isolation region and the second active region, and introducing (107) a nitrogen bearing impurity by implantation into a surface of the active region. The method also includes removing the portion being masked, e.g., stripping. A step of forming a silicon oxynitride layer (117) from the nitrogen bearing impurity on the surface of the first active region and forming silicon dioxide (115) on the second active region is included.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully