Network traffic by instruction packet size reduction

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United States of America Patent

PATENT NO 6041351
SERIAL NO

08843919

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Abstract

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Network congestion is mitigated through instruction size reduction. Server instruction to client is stored in most-recently-used cache, such that subsequent retransmission attempt of such instruction is detected, avoided, and instead executed locally from cache. Storage performance is tuned optimally to achieve partial avoidance effect according to graphical or text types, and dynamically adaptable as instruction characteristic changes. MRU FIFO cache provides processors with local checking of new instructions in process for network transmission against most recently executed instructions, thereby avoiding repeat transmissions of instructions already accessible locally. More than one instruction set or packet may also be evaluated, stored and monitored similarly, but instruction subsets may be executed selectively. Each processor maintains same cache information synchronously.

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Patent Owner(s)

Patent OwnerAddress
ORACLE AMERICA INC500 ORACLE PARKWAY REDWOOD SHORES CA 94065

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kho, Samuel P Sunnyvale, CA 5 37

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