Null convention logic gates with flash, set and reset capability
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Mar 28, 2000
Grant Date -
N/A
app pub date -
Jan 8, 1998
filing date -
Jan 8, 1998
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Threshold logic gates are disclosed that respond to signals that may assume at least a first state having an arithmetic or logic meaning, and a second NULL state that has no arithmetic or logic meaning. Threshold values may be equal to or less than the number of input signal lines. Threshold gates switch their outputs from NULL to a meaningful state when the threshold number of inputs assume meaningful states. Gates will hold outputs in a meaningful (or non-null) state when the number of asserted inputs remains positive, even if the number is less than the threshold. In one embodiment, threshold gates include a 'FLASH' input that forces the gate to NULL. In another embodiment, threshold gates include one or more 'SET' inputs that drive the gate output to NULL or to a meaningfull state.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully