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Abstract

A nonvolatile semiconductor memory device comprises a memory cell array in which a plurality of memory cell units are arranged in a matrix, and a first and second common signal lines for exchanging signals with the memory cell array, wherein each of the memory cell units contains a nonvolatile memory section having at least one nonvolatile memory cell, a first select MOS transistor for making the nonvolatile memory section conducting to the first common signal line, and a second select MOS transistor with a threshold voltage different from that of the first select MOS transistor for making the nonvolatile memory section conducting to the second common signal line.

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First Claim