Use of pulsed-DC wafer bias for filling vias/trenches with metal in HDP physical vapor deposition
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 18, 2000
Grant Date -
N/A
app pub date -
Jun 23, 1997
filing date -
Jun 23, 1997
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
The present invention provides a method and apparatus for preferential PVD conductor fill in an integrated circuit structure. The present invention utilizes a high density plasma for sputter deposition of a conductive layer on a patterned substrate, and a pulsed DC power source capacitively coupled to the substrate to generate an ion current at the surface of the substrate. The ion current prevents sticking of the deposited material to the field areas of the patterned substrate, or etches deposited material from the field areas to eliminate crowning or cusping problems associated with deposition of a conductive material in a trench, hole or via formed on the substrate.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully