Method and apparatus for controlling clock signals

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United States of America Patent

PATENT NO 6052004
SERIAL NO

09097049

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Abstract

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A clock signal control circuit includes a divider for dividing an external clock signal into multiple phase clock signals, timing difference dividers connected to the divider for dividing a difference in input timing of pulse edge between the multiple phase clock signals having different phases from each other to generate different phase clock signals, multiplexers connected to the timing difference dividers for multiplexing the different phase multiplied clock signals to generate multiplexed clock signals, and a synthesizer connected to the multiplexers for synthesizing the multiplexed clock signals into a single multiplied clock signal.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATIONTOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Saeki, Takanori Tokyo, JP 95 1060

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