Method and apparatus using a memory model

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United States of America Patent

PATENT NO 6053948
SERIAL NO

08995708

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Abstract

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A computer system including a memory model of a memory circuit. The computer system comprises a processor coupled to receive and manipulate the memory model, and a memory including the memory model. The memory model includes: a number of address bits corresponding to a number of address bits of the memory circuit; a number of data bits corresponding to a number of data bits of the memory circuit; and a memory type parameter corresponding to a type of the memory circuit.

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Patent Owner(s)

Patent OwnerAddress
SYNOPSYS INCCALIFORNIA USA CALIFORNIA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ganapathi, Mahadevan Sunnyvale, CA 2 120
Girczyc, Emil F Los Altos, CA 1 95
Nayudu, Sivaram Krishna Jersey City, NJ 2 120
Vaidyanathan, Radha Los Altos, CA 8 201

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