Stress-free silicon wafer and a die or chip made therefrom
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 25, 2000
Issued Date -
N/A
app pub date -
Mar 26, 1998
filing date -
Apr 3, 1995
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A stress-free wafer comprising a substrate formed of a semiconductor material having front side and back side planar and parallel surfaces and having a thickness ranging from 2 to 7 mils. The front side has electronic circuitry therein with exposed contact pads. The back side is ground and polished so that the wafer is substantially stress free and can withstand bending over a 2' radius without breaking or damaging.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully