System for testing circuit board integrity

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United States of America Patent

PATENT NO 6054863
SERIAL NO

08710130

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Abstract

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A system for testing circuit boards comprising a probe network having a plurality of probes wherein each probe is adapted for contacting an end of a corresponding circuit board network and wherein each probe and network define a node having an address. The system further comprises a control device that includes a node address generator and a timing circuit having an output for outputting a pulse to the node having the address generated by the node address generator and for coupling the remaining nodes to electrical ground. The system further comprises a comparator for comparing the pulse outputted by the timing circuit to predetermined data.

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Patent Owner(s)

Patent OwnerAddress
META PLATFORMS INC1601 WILLOW ROAD MENLO PARK CA 94025

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Geyer, Siegfried Nufringen, DE 1 7
Hendricks, Charles J Wappingers Falls, NY 9 522
Morrison, Thomas Pleasant Valley, NY 19 356
Probst, Klaus Herrenberg, DE 5 175

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