Process for manufacturing semiconductor integrated circuit device
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United States of America Patent
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-
May 2, 2000
Grant Date -
N/A
app pub date -
Sep 22, 1997
filing date -
Sep 20, 1996
priority date (Note) -
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status (Latency Note)
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Abstract
In order that reaction products of low vapor pressure may be prevented from being deposited on the side wall of a predetermined pattern when this pattern is to be formed by dry-etching a Pt film or a PZT film, a resist mask 54 having a rounded outer periphery at its head is used when the Pt film 53 deposited on a semiconductor substrate 50 is to be dry-etched. After this dry-etching, moreover, an overetching of a proper extent is performed to completely remove the side wall deposited film 55 which is left on the side of the pattern. The resist mask 54 is formed by exposing and developing a benzophenone novolak resist and subsequently by heating to set it while irradiating it, if necessary, with ultraviolet rays.
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