Failover system for a DASD storage controller reconfiguring a first processor, a bridge, a second host adaptor, and a second device adaptor upon a second processor failure
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United States of America Patent
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May 9, 2000
Grant Date -
N/A
app pub date -
Feb 20, 1998
filing date -
Feb 20, 1998
priority date (Note) -
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status (Latency Note)
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Abstract
Disclosed is a storage controller for interfacing between a plurality of host systems and direct access storage devices (DASDs). The storage controller includes a bridge, a first host adaptor, and a first device adaptor that are configured to communicate with a first processor. A first DASD is linked to the first device adaptor. The bridge interfaces the first processor, the first host adaptor, and the first device adaptor. The storage controller further includes a second host adaptor and a second device adaptor that are configured to communicate with a second processor. A second DASD is linked to the second device adaptor. The bridge further interfaces the second processor, the second host adaptor, and the second device adaptor. After configuration, an input/output (I/O) request from at least one of the host systems is directed to the first DASD via the first host adaptor, the first processor, and the first device adaptor. An I/O request from at least one of the host systems to the second DASD is directed via the second host adaptor, the second processor, and the second device adaptor. Upon determining that the second processor has failed, the first processor configures the second host adaptor and second device adaptor to communicate with the first processor. After configuration in response to determining that the second processor has failed, an I/O request from at least one of the host systems to the second DASD is transferred via the second host adaptor, the first processor, and the second device adaptor.
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