Semiconductor device having a sub-chip-scale package structure and method for forming same
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United States of America Patent
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May 16, 2000
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N/A
app pub date -
Dec 1, 1997
filing date -
Dec 1, 1997
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Abstract
A semiconductor device (1) has a sub-chip-scale package structure, wherein the substrate (50) has at least one of an X dimension and a Y dimension smaller than a corresponding dimension of the semiconductor die (10). The semiconductor device (1) has a plurality of electrical connections between the semiconductor die and the substrate, the electrical connections (15, 20) being provided within the outer periphery of the substrate. The semiconductor device (1) permits packaging of semiconductor die (10) at the wafer level, that is, before the semiconductor die are singulated.
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