Method for fabricating trench-isolation structure
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United States of America Patent
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May 30, 2000
Grant Date -
N/A
app pub date -
May 18, 1998
filing date -
May 18, 1998
priority date (Note) -
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Abstract
A method of fabricating a trench-isolation structure is provided. The fabricated trench-isolation structure in accordance with the present invention is formed on a semiconductor substrate. Sequentially, a buffer layer and a first isolating layer are formed to overlie the semiconductor substrate. After the first isolating layer is patterned to form an opening, the step of forming spacers on the sidewall of the opening follows. At the same time, within the range of the opening the portion of the buffer layer not covered by the spacers is removed to expose a portion of the semiconductor substrate. Then, the exposed semiconductor substrate is etched to form a trench. After a second isolating layer is formed on the peripherals of the trench, an isolation plug is filled in the trench.
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