Multi-level interconnect metallization technique

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6069078
SERIAL NO

09001130

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A method of forming metallization layers and vias as part of an interconnect structure within an integrated circuit ('IC') is disclosed. The metallization layers and vias are formed of an alloy consisting of tungsten and one or more other materials such as aluminum, gold, copper, cobalt, titanium, molybdenum or platinum. In the alternative, the alloy may include aluminum and exclude tungsten. The alloy that forms the metallization layers and vias is deposited onto the IC substrate using ionized cluster beam ('ICB') apparatus. The IC substrate is an 'in-process' IC in that various active devices (e.g., bipolar and/or MOS transistors), resistors and capacitors are formed in the substrate using conventional techniques prior to the ICB deposition of the alloy layers. Intermediate IC substrate processing steps (e.g., patterning and etching to form the vias) may take place in-between ICB deposition steps.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
AEROFLEX COLORADO SPRINGS INC4350 CENTENNIAL BLVD COLORADO SPRINGS CO 80907-3486

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jerome, Rick C Vancouver, WA 21 293
Weaver, James C Richmond, VT 37 3569

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation