Main memory bank indexing scheme that optimizes consecutive page hits by linking main memory bank address organization to cache memory address organization

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United States of America Patent

PATENT NO 6070227
SERIAL NO

08963673

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A main memory indexing scheme optimizes consecutive page hits in computer systems having a main memory system and a cache memory. In accordance with the present invention, one or more bank select bits required by the main memory system are formed from one or more of the address bits that are used by the cache memory as the tag field. Preferably, the lower-order bits of the tag field are used. To increase the page hit rate even further, additional bank select bits are formed from the address bits immediately above the bits used to access columns. In one embodiment of the present invention, address bits are simply mapped to bank bits using a one-to-one correspondence. In another embodiment, address bits from the tag field and address bits immediately above the column bits are combined using a function such as an exclusive-OR operation or an addition operation, with the result of the function provided to the bank select bits. The present invention greatly improves the page hit rate of computer systems, while requiring few additional resources.

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Patent Owner(s)

  • SAMSUNG ELECTRONICS CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Rokicki, Tomas G Palo Alto, CA 4 389

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