Apparatus for reducing the effects of power supply distribution related noise
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jun 6, 2000
Grant Date -
N/A
app pub date -
Dec 1, 1997
filing date -
Dec 1, 1997
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method is provided for reducing the effects of power supply distribution related noise in an integrated circuit, the integrated circuit having a power supply bus, a ground bus, a DRAM-technology capacitor, and a load circuit. The method includes forming the DRAM-technology capacitor adjacent the load circuit, and connecting the DRAM-technology capacitor directly between the supply voltage bus and the ground voltage bus.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully