System for dynamic buffer allocation comprising control logic for controlling a first address buffer and a first data buffer as a matched pair
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United States of America Patent
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Jun 6, 2000
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N/A
app pub date -
Jul 18, 1997
filing date -
Jul 18, 1997
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Abstract
A system for dynamically allocating buffers between components in a computer system is described. The system uses matched sets of bi-directional buffers to control data flow between the processor and the computer bus. The dynamic buffer allocation system allows simultaneous data transfer from the processor to the buffers, and from the buffers to the computer bus.
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