Laser segmentation of plated through-hole sidewalls to form multiple conductors
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United States of America Patent
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-
Jun 13, 2000
Grant Date -
N/A
app pub date -
Jan 28, 1999
filing date -
Jan 28, 1999
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method for generating multiple conductor segments within a plated through hole of a printed circuit board. The method utilizes laser light to define the segmented surfaces bounding a hole in a circuit board. Two embodiments of this method are a subtractive process and an additive process. The subtractive process starts with a plated through hole and uses a laser to removes vertical strips of the PTH conductive lining to form the multiple conductive segments. The additive process applies a seeding material to a bare hole in a circuit board, removes vertical strips of the seeding material via laser scanning, and applies an electrically conductive material to the seeded surfaces to form the multiple conductive segments.
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