Packet type integrated circuit memory devices having pins assigned direct test mode and associated methods
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United States of America Patent
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Jun 20, 2000
Grant Date -
N/A
app pub date -
Dec 8, 1998
filing date -
Dec 8, 1997
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An integrated circuit memory device and method including a direct mode assigns internal data and address signals to separate pins. In particular, a plurality of first pins is assigned to the plurality of internal data signals that provide the data to the memory array in direct test mode. A plurality of second pins is assigned to the plurality of internal address signals that provide the address to the memory array in direct test mode, wherein none of the pins included in first plurality of pins are included in the second plurality of pins.
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