System and method of computer operating mode control for power consumption reduction

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United States of America Patent

PATENT NO 6079025
SERIAL NO

09121352

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An activity sensing power reduction and conservation apparatus, system, and method for a computer system. The computer system has resources including a processor, a memory, and an input/output device, and an operating system for controlling the resources. At least one of the resources can be placed into in any one of three operating modes including a first mode having a first power consumption level, a second mode having a second power consumption level less than the first level, and a third mode having a third level less than the second level. The first mode may be characterized by maintaining clocking of the processor at a first clock frequency, the second mode by clocking the processor at a second clock frequency less than the first frequency or by not maintaining clocking of the processor, and the third mode by maintaining operation of the memory to preserve the integrity of any stored memory contents. During operation of the computer system in the first mode, activity is monitored to detect completion of idle threads executing on the system, and the processor clock is slowed or stopped to at least that one resource in response to the idle thread completion detection. During operation in the second mode where the processor clock is slowed or stopped, a slow or stop resource command is generated to slow or turn off clock signal to at least one of the resources in response to occurrence of a timeout condition indication received from a timer circuit.

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Patent Owner(s)

Patent OwnerAddress
ST CLAIR INTELLECTUAL PROPERTY CONSULTANTS INCSUITE TWO 16845 KERCHEVAL AVENUE GROSSE POINTE MI 48230

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fung, Henry Tat-Sang San Jose, CA 6 453

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