Methodology for achieving dual gate oxide thicknesses

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United States of America Patent

PATENT NO 6080682
SERIAL NO

08993716

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Abstract

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Dual gate oxide layer thicknesses are achieved by depositing a thin blocking layer on active regions of a semiconductor substrate, such as silicon nitride, oxynitride, or oxide. Selected active regions are nitridated through a patterned photoresist mask formed thereon. The blocking layer protects the substrate from the photoresist mask and enables nitriding, as by ion implantation, plasma exposure, or rapid thermal annealing.

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Patent Owner(s)

  • MONTEREY RESEARCH, LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ibok, Effiong E Sunnyvale, CA 16 449

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