Wear leveling techniques for flash EEPROM systems

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6081447
SERIAL NO

09262813

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A mass storage system made of flash electrically erasable and programmable read only memory ('EEPROM') cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend the service lifetime of the memory system. Since this type of memory cell becomes unusable after a finite number of erase and rewrite cycles, although in the tens of thousands of cycles, uneven use of the memory banks is avoided so that the entire memory does not become inoperative because one of its banks has reached its end of life while others of the banks are little used. Relative use of the memory banks is monitored and, in response to detection of uneven use, have their physical addresses periodically swapped for each other in order to even out their use over the lifetime of the memory.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
SANDISK TECHNOLOGIES INC.PLANO, TX29
WESTERN DIGITAL CORPORATIONIRVINE, CA12

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gupta, Anil Irvine, CA 69 3708
Lofgren, Karl M J Newport Beach, CA 23 3053
Norman, Robert D San Jose, CA 122 10592
Thelin, Gregory B Garden Grove, CA 27 3740

Cited Art Landscape

Patent Info (Count) # Cites Year
 
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* Cited By Examiner

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
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7103732 Method and apparatus for managing an erase count block 27 2002
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7035967 Maintaining an average erase count in a non-volatile storage system 48 2002
6985992 Wear-leveling in non-volatile storage systems 59 2002
6973531 Tracking the most frequently erased blocks in non-volatile memory systems 52 2002
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7188228 Hybrid mapping implementation within a non-volatile memory system 61 2003
8412879 Hybrid implementation for error correction codes within a non-volatile memory system 8 2003
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7032087 Erase count differential table within a non-volatile memory system 39 2003
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7064003 Memory package 4 2004
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7702880 Hybrid mapping implementation within a non-volatile memory system 7 2006
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8700840 Nonvolatile memory with write cache having flush/eviction methods 5 2009
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7646666 Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks 1 2009
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7889590 Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks 0 2009
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9218852 Smart bridge for memory core 0 2011
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* 2013/0159,766 WEAR LEVELING OF MEMORY DEVICES 11 2011
8706990 Adaptive internal table backup for non-volatile memory system 0 2012
8910017 Flash memory with random partition 0 2012
8503240 Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks 0 2012
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* 2010/0161,880 FLASH INITIATIVE WEAR LEVELING ALGORITHM 16 2006
 
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7743203 Managing flash memory based upon usage history 26 2007
 
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6788609 Storage device employing a flash memory 44 2003
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6925012 Storage device employing a flash memory 15 2004
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7154805 Storage device employing a flash memory 5 2005
7123519 Storage device employing a flash memory 6 2005
7082510 Storage device employing a flash memory 10 2005
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7353325 Wear leveling techniques for flash EEPROM systems 27 2005
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7082490 Method and system for enhancing the endurance of memory cells 1 2003
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* Cited By Examiner