Lock-in aid frequency detector
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United States of America Patent
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Jun 27, 2000
Grant Date -
N/A
app pub date -
Aug 27, 1998
filing date -
Aug 27, 1998
priority date (Note) -
Expired
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Abstract
Circuit and method for generating a signal for use in locking a second signal on a first signal. The first and second signals have an associated frequency. A first beat note signal and a second beat note signal are generated from the first and second signals, respectively, when the frequencies of the first and second signals are not equal. The circuit includes a first and second flip-flop and detector circuitry. The first flip-flop is configured to receive the first and second beat note signals for generating a first state signal. The first flip-flop generates the first state signal by sampling the second beat note signal at a first periodic interval of the first beat note signal. The second flip-flop is configured to receive the first and second beat note signals for generating a second state signal. The second flip-flop generates the second state signal by sampling the second beat note signal at a second periodic interval of the first beat note signal. The detector circuitry is coupled to receive the first and second state signals from the first and second flip-flops for detecting a polarity of the frequency difference between the first and second signals. The polarity of the frequency difference is defined in a tri-state having a positive state, a negative state, and a zero state.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| MAXIM INTEGRATED PRODUCTS | 120 SAN GABRIEL DRIVE SUNNYVALE CA 94086 | |
| HISYS GMBH | AHRENSBURGER STR 3 30659 HANNOVER |
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Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Filip, Jan | Burgdorf, DE | 8 | 85 |
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| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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