Adjustable output driver circuit
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United States of America Patent
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-
Jul 4, 2000
Issued Date -
N/A
app pub date -
Jun 9, 1999
filing date -
Nov 26, 1996
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An output driver circuit offers wave-shaping and logic level adjustment for high speed data communications in a synchronous memory such as a dynamic random access memory (DRAM). Level adjustment is obtained by resistive division between a termination resistor and controllable impedances between an output node and VDD and VSS power supplies. Wave-shaping functions include slew rate modification of the signal at the output node, by sequentially turning on or off output transistors in response to a transition in an input signal. Different schemes of weighting the output transistors obtains different wave-shaping, characteristics of the output signal.
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