Monitoring processor execution cycles to prevent task overrun in multi-task, hard, real-time system
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United States of America Patent
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Jul 4, 2000
Issued Date -
N/A
app pub date -
Jul 13, 1994
filing date -
Sep 26, 1991
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Hard, real-time, multi-tasking system is monitored by combined hardware and software and logic to detect overrun of any task beyond a declared maximum processor cycle limit for the task. Processor execution cycles utilized by DMA or interrupt processing and not related to the task being executed are not counted. Counter hardware and control logic reduces software overhead for monitoring execution cycle utilization by a task and provides capability not only of overrun detection, but programmed cycle usage alarm, consumed cycle count and overall processor loading or utilization measurements to be made.
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