Current mirror circuit with minimized input to output current error
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United States of America Patent
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-
Jul 11, 2000
Grant Date -
N/A
app pub date -
Nov 5, 1998
filing date -
Nov 5, 1997
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A current mirror circuit for outputting an output current in proportion to an input current, comprises a first transistor having a collector through which the input current flows, a second transistor having a base connected to a base of the first transistor and a collector through which the output current flows, a third transistor having a base connected to a collector of the first transistor, and an emitter through which a predetermined current flows, and a fourth transistor having a base connected to an emitter of the third transistor, and an emitter connected to the base of the first and second transistors. A variable current source is connected between an emitter of the third transistor and ground to cause the predetermined current to flow through the third transistor. The value of the predetermined current is variable. An input current detecting circuit is provided to detect the input current for controlling the variable current source so as to maintain the predetermined current in proportion to the input current.
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