Method and apparatus for improving system performance when reordering commands
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United States of America Patent
Stats
-
Jul 11, 2000
Grant Date -
N/A
app pub date -
Jun 13, 1997
filing date -
Jun 13, 1997
priority date (Note) -
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status (Latency Note)
Importance
Abstract
A method and apparatus for ordering memory access commands. A command ordering circuit which is described includes a plurality of command slots which receive memory access commands. A page register stores a value indicating a last page accessed by a prior memory access command. Comparators compare the value in the page register to values stored in the command slots, and an arbiter receives outputs from the comparators and selects a command from one of the slots. According to the method described, memory accesses are reordered depending on the portion of memory accessed. A first memory access command requesting access to a first portion of memory is issued. Additional memory access commands also referencing the first portion of memory are issued until a count is reached. After the count is reached, a second memory access command which references a second portion of memory is issued.
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