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Abstract

A method for detecting electrical defects in a semiconductor wafer, includes the steps of: a) applying charge to the wafer such that electrically isolated structures are raised to a voltage relative to electrically grounded structures; b) obtaining voltage contrast data for at least a portion of the wafer containing such structures using an electron beam; and c) analyzing the voltage contrast data to detect structures at voltages different from predetermined voltages for such structures. Voltage contrast data can take one of a number of forms. In a simple form, data for a number of positions on a line scan of an electron beam can be taken and displayed or stored as a series of voltage levels and scan positions. Alternatively, the data from a series of scans can be displayed as a voltage contrast image. Analysis can be achieved by comparison of one set of voltage contrast data, for example voltage contrast data from one die on a wafer, with one or more other such sets, for example voltage contrast data for corresponding structures on one or more preceding dice, so as to determine differences therebetween.

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First Claim