Extended frame-rate acceleration with gray-scaling for multi-virtual-segment flat-panel displays

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United States of America Patent

PATENT NO 6091386
SERIAL NO

09103338

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Abstract

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Frame acceleration is achieved by driving multiple LCD frames to a flat-panel display for each CRT frame. Rather than divide the flat-panel display into an upper and a lower half, the panel is divided into many segments. These are physical segments when the panel is row-addressable so that any segment can be accessed at any time. Virtual segments are used for standard dual-scan panels. A buffer memory receives gray-scale converted pixels and arranges them into segment-blocks. Multiple LCD frames are generated and stored using data acceleration. Frame-rate-cycling (FRC) of these multiple frames is used for gray-scaling. The size of the buffer memory is significantly reduced by organizing the frames into three or more segments since input and output timing can be overlapped, allowing lines to be sent to the panel at a higher rate than received by the buffer. While physical segments are most efficient, virtual segments still reduce memory requirements, especially when the multiple LCD frames are repeated. Standard progressive-scan panels benefit from less flicker and more accurate gray scaling with data acceleration. When data acceleration is combined with repeating frames, higher frame acceleration is achieved with low memory requirements.

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Patent Owner(s)

Patent OwnerAddress
HANGER SOLUTIONS LLC44 MILTON AVENUE SUITE 254 ALPHARETTA GA 30009

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bassetti, Chester F Danville, CA 8 161
Yu, Vincent Chor-Fung Sunnyvale, CA 3 91

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