Test circuit

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United States of America Patent

PATENT NO 6092227
SERIAL NO

09018934

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Abstract

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A test circuit includes a writing unit that outputs m-bit data captured upon receipt of a clock signal, branches the m-bit data n identical m-bit data signals, and stores the n m-bit data signals in a memory device. A function determining unit reads the n m-bit data signals from the memory, compares one of the n m-bit data signals to an m-bit expected value, and determines coincidence or non-coincidence between the n m-bit data signal and an expected value.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATIONTOKYO 135-0061

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hatakenaka, Makoto Tokyo, JP 32 300
Kitaguchi, Akira Tokyo, JP 9 69
Matsuo, Masaaki Nagasaki, JP 69 751
Saitoh, Tsuyoshi Nagasaki, JP 17 128
Shiroshima, Kiyoyuki Hyogo, JP 5 32
Toki, Hideki Hyogo, JP 3 39

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