Current control technique
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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-
Jul 25, 2000
Grant Date -
N/A
app pub date -
Aug 27, 1998
filing date -
Aug 29, 1997
priority date (Note) -
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Abstract
An output driver circuit and current control technique to facilitate high-speed buses with low noise is used to interface with high-speed dynamic RAMs (DRAMs). The architecture includes the following components: an input isolation block (120), an analog voltage divider (104), an input comparator (125), a sampling latch (130), a current control counter (115), and a bitwise output driver (output driver A 107 and output driver B 111).
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