Programmable controller with a BPU that executes first-class instructions, a CPU that executes second-class instructions, and a skip instruction processing section that skips the current instruction without transferring control right to CPU
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United States of America Patent
Stats
-
Jul 25, 2000
Grant Date -
N/A
app pub date -
Feb 19, 1998
filing date -
Feb 26, 1997
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A programmable controller includes a BPU that executes first-class instructions, a CPU that executes second-class instructions, and a memory that is shared by the BPU and the CPU and stores a program, which is formed of a combination of first-class and second-class instructions. The programmable controller also includes a judgment-data storage section that stores judgment data for judging whether a second-class instruction is a skippable instruction or not, and a skip processing section that judges whether the operation result of the preceding instruction satisfies a skip condition or not. If judging that the operation result satisfies the skip condition, then the skip processing section judges whether a current instruction of the second class is a skippable instruction or not, based on the above judgment data, and skips the current instruction without transferring control right to the CPU, if the current instruction is a skippable instruction.
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